1. Field of the Invention
The present invention relates to semiconductor integrated circuit devices, and particularly to the structure of a semiconductor integrated circuit device to input/output data at high speed.
2. Description of the Background Art
Regarding semiconductor integrated circuit devices such as a dynamic random access memory (referred to as DRAM hereinafter) of a semiconductor memory device, the practical usage is known of a rambus DRAM (referred to as RDRAM hereinafter) and a double data rate synchronous DRAM (referred to as DDR SDRAM hereinafter depending upon the interface specification in order to improve the data input/output rate with an external source.
The chip of these semiconductor memory devices generally includes a plurality of data input/output terminals (pads) through which data is transferred to/from an external source.
Deviation in the data input/output timing between data input/output terminals (referred to as xe2x80x9cskewxe2x80x9d hereinafter) that cannot be ignored occurs caused by difference in the signal transmission path length in the semiconductor memory device chip corresponding to each data input/output terminal or difference in the length of the path from each data input/output terminal to the external pin of the package. In other words, this occurrence of skew is caused by difference in the input/output capacitance between data input/output terminals when viewed from outside. This skew will become the cause of preventing increase of the data input/output speed.
Such a problem also resides between input terminals with respect to other control signals as well as between data input/output terminals of a semiconductor memory device. In general, this problem is encountered in a semiconductor integrated circuit that inputs/outputs a signal from/to an external source via a plurality of terminals.
Conventionally, it is difficult to adjust-the difference in the input/output capacitance present between each terminal once the semiconductor integrated circuit device is completed as a product. In order to adjust the input/output capacitance, the mask used in the photolithography step must be modified to change the circuit pattern or the like during the fabrication step. However, adjusting the input/output capacitance by such a method does not fit in with the reality from the standpoint of the cost and time required.
An object of the present invention is to provide a semiconductor integrated circuit device that can easily adjust difference in the input/output capacitance present between data input/output terminals, and that can suppress skew generation.
According to an aspect of the present invention, a semiconductor integrated circuit device includes an internal circuit, a plurality of input nodes, a plurality of lines, a mode set circuit, and a plurality of variable capacitance circuits.
The internal circuit generates a plurality of output data according to a plurality of externally applied control signals and a plurality of input signals.
The plurality of input nodes receive a plurality of input data signals from outside the semiconductor integrated circuit device.
The plurality of lines transmit an input data signal to the internal circuit from a plurality of input nodes.
The mode set circuit sets an operation mode of the internal circuit and generates a plurality of capacitance set signals according to the combination of a plurality of control signals.
The plurality of variable capacitance circuits are provided between the plurality of lines and a predetermined reference potential, respectively, and can change the capacitance independently according to the plurality of capacitance set signals.
According to another aspect of the present invention, a semiconductor integrated circuit device includes an internal circuit, a plurality of input nodes, a plurality of lines, and a plurality of variable capacitance circuits.
The internal circuit generates a plurality of output data according to a plurality of externally applied control signals and a plurality of input signals.
The plurality of input nodes receive a plurality of input data signals from outside the semiconductor integrated circuit device.
The plurality of lines transmit an input data signal to the internal circuit from a plurality of input nodes.
The plurality of variable capacitance circuits are provided between the plurality of lines and a predetermined reference potential, respectively, and can change the capacitance independently in a nonvolatile manner from an external source.
The main advantage of the present invention is that the difference in the input/output capacitance present between data input/output terminals can be adjusted easily, and that skew generation can be suppressed.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.